Open ultrasound pulse-echo features

Design and specs of the un0rick

1. FPGA: Lattice iCE40HX4K - TQFP 144 Package
2. Memory:
   • 8 Mbit SRAM, 10ns, 512 k x 16, equivalent:
   • 65 full lines of 120us at 64Msps
   • 840 lines of 120us at 10Msps, 8 bits * 8 Mb SPI Flash for FPGA configuration
3. Ultrasound processing:
   • VGA: AD8331 controled by DAC
   • Pulser: MD1210 + TC6320
   • ADC: 65Msps ADC10065
   • 10 bits of data / sample
   • 2 bits of line counters
   • 4 bits of IOs (counters, …)
4. Parameters: Settings programable via USB or Raspberry Pi
   • Type of acquisition (one line / set of lines)
   • Number of lines
   • Length of lines acquisitions
   • Delay between acquisitions
   • Pulse width
   • Delay between pulse and beginning of acquisitions
   • 200us time-gain-compensation programmable (8 bits, from 0 to Max), every 5us
5. Extensibility:
   • 2 x Pmod connectors
   • SMA plug for transducers
   • RPi GPIO
6. User Interfaces:
   • 2 x PMOD for IOs
   • 3 x push button (with software noise debouncing)
   • Jumpers for high voltage selection
7. Input Voltage:
   • 5 V from RPi or USB
   • Uses 350mA-450mA at 5V
8. Fully Open Source:
   • Hardware: github - done through upverter.
   • Gateware: github
   • Toolchain: Project YoSys
   • Documentation: this website
9. Operating Voltage:
   • FPGA and logics at at 3.3 V
   • High voltage at 25V, 50V, 75V
10. Dimensions: @todo!
11. Weight: @todo!

Overview of the board itself